Datasheet

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PARAMETER MEASUREMENT INFORMATION
t
PZH
t
PHZ
t
PZL
V
OH
V
OL
C
L
(see Note A)
LOAD CIRCUIT
S1
2 × V
CCO
Open
GND
R
L
R
L
t
PLH
t
PHL
t
PLZ
V
CCB
/2V
CCB
/2
V
CCI
/2V
CCI
/2
V
CCI
0 V
V
CCO
/2V
CCO
/2
V
OH
V
OL
0 V
V
CCO
/2
V
OL
+ V
TP
V
CCO
/2
V
OH
- V
TP
0 V
V
CCI
0 V
V
CCI
/2V
CCI
/2
t
w
Input
V
CCB
V
CCO
Output
Input
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
2 × V
CCO
GND
TEST
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2 kΩ
1 kΩ
500 Ω
500 Ω
V
CCO
R
L
0.1 V
0.15 V
0.15 V
0.3 V
V
TP
C
L
15 pF
30 pF
30 pF
30 pF
S1
From Output
Under Test
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 x V
CCO
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES393B – JUNE 2002 – REVISED MARCH 2008
Figure 2. Load Circuit and Voltage Waveforms
8 Submit Documentation Feedback Copyright © 2002 – 2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AVCBH164245