Datasheet
1
FEATURES
DESCRIPTION/ORDERING INFORMATION
SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES393B – JUNE 2002 – REVISED MARCH 2008
www.ti.com
2
• Member of the Texas Instruments • I
off
Supports Partial-Power-Down Mode
Widebus™ Family Operation
• Dynamic Output Control ( DOC™) Circuitry • Fully Configurable Dual-Rail Design Allows
Dynamically Changes Output Impedance, Each Port to Operate Over the Full 1.4-V to
Resulting in Noise Reduction Without Speed 3.6-V Power-Supply Range
Degradation
• Bus Hold on Data Inputs Eliminates the Need
• Dynamic Drive Capability Is Equivalent to for External Pullup/Pulldown Resistors
Standard Outputs With I
OH
and I
OL
of ± 24 mA at
• Latch-Up Performance Exceeds 100 mA Per
2.5-V V
CC
JESD 78, Class II
• Control Inputs V
IH
/V
IL
Levels are Referenced to
• ESD Protection Exceeds JESD 22
V
CCB
Voltage
– 2000-V Human-Body Model (A114-A)
• If Either V
CC
Input Is at GND, Both Ports Are in
– 200-V Machine Model (A115-A)
the High-Impedance State
– 1000-V Charged-Device Model (C101)
• Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The
A-port is designed to track V
CCA
. V
CCA
accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to
track V
CCB
. V
CCB
accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCBH164245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable ( OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCBH164245 is designed so that the control pins (1DIR, 2DIR, 1 OE, and 2 OE) are supplied by V
CCB
.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CCB
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down. If either V
CC
input is at GND,
both ports are in the high-impedance state.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
TSSOP – DGG Tape and reel SN74AVCBH164245GR AVCBH164245
TVSOP – DGV Tape and reel SN74AVCBH164245VR WBH4245
– 40 ° C to 85 ° C
VFBGA – GQL Tape and reel SN74AVCBH164245KR WBH4245
VFBGA – ZQL (Pb-free) Tape and reel SN74AVCBH164245ZQLR WBH4245
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 Widebus, DOC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002 – 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.