Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Transducer Converter, Bidirectional, Three-state TSSOP 48

www.ti.com

FEATURES

DESCRIPTION/ORDERING INFORMATION

SN74AVCA164245

16-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES395B – JULY 2002 – REVISED OCTOBER 2005

• Member of the Texas Instruments Widebus™ • Overvoltage-Tolerant Inputs/Outputs Allow

Family Mixed-Voltage-Mode Data Communications

• DOC™ Circuitry Dynamically Changes Output • I

off

Supports Partial-Power-Down Mode

Impedance, Resulting in Noise Reduction Operation

Without Speed Degradation

• Fully Configurable Dual-Rail Design Allows

• Dynamic Drive Capability Is Equivalent to Each Port to Operate Over the Full 1.4-V to

Standard Outputs With I

and I

of ± 24 mA 3.6-V Power-Supply Range

at 2.5-V V

• Latch-Up Performance Exceeds 100 mA Per

• Control Inputs V

Levels Are Referenced JESD 78, Class II

to V

CCA

Voltage

• ESD Protection Exceeds JESD 22

• If Either V

Input Is at GND, Both Ports Are in

– 2000-V Human-Body Model (A114-A)

the High-Impedance State

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A

port is designed to track V

CCA

. V

CCA

accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to

track V

CCB

. V

CCB

accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage

bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCA164245 is designed for asynchronous communication between data buses. The device transmits

data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input. The output-enable ( OE) input can be used to disable the outputs so the buses are

effectively isolated.

The SN74AVCA164245 is designed so that the control pins (1DIR, 2DIR, 1 OE, and 2 OE) are supplied by V

CCA

To ensure the high-impedance state during power up or power down, OE should be tied to V

CCA

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down. If either V

input is at GND,

then both ports are in the high-impedance state.

ORDERING INFORMATION

PACKAGE

(1)

ORDERABLE PART NUMBER TOP-SIDE MARKING

TSSOP – DGG Tape and reel SN74AVCA164245GR AVCA164245

TVSOP – DGV Tape and reel SN74AVCA164245VR WA4245

–40 ° C to 85 ° C

VFBGA – GQL Tape and reel SN74AVCA164245KR

WA4245

VFBGA – ZQL Tape and reel 74AVCA164245ZQLR

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (18 pages)

PAGE 1
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 FEATURES • • • • • Member of the Texas Instruments Widebus™ Family DOC™ Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation Dynamic Drive Capability Is Equivalent to Standard Outputs With IOH and IOL of ±24 mA at 2.
PAGE 2
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.
PAGE 3
www.ti.com SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES395B – JULY 2002 – REVISED OCTOBER 2005 FUNCTION TABLE (EACH 8-BIT SECTION) INPUTS OE OPERATION DIR L L B data to A bus L H A data to B bus H X Isolation LOGIC DIAGRAM (POSITIVE LOGIC) 1DIR 1 2DIR 48 1A1 25 1OE 47 2A1 2 To Seven Other Channels 24 2OE 36 13 1B1 2B1 To Seven Other Channels Pin numbers shown are for the DGG and DGV packages.
PAGE 4
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB Supply voltage range VI Input voltage range (2) MIN MAX –0.5 4.6 I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 VCCA + 0.5 B port –0.
PAGE 5
www.ti.com SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES395B – JULY 2002 – REVISED OCTOBER 2005 Recommended Operating Conditions (1) (2) (3) VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.4 3.6 V VCCB Supply voltage 1.4 3.
PAGE 6
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL Control inputs II A port Ioff B port TEST CONDITIONS IOZ B port A port ICCA MIN TYP (3) MAX VI = VIH 1.4 V to 3.6 V 1.4 V to 3.6 V IOH = –2 mA, VI = VIH 1.4 V 1.4 V IOH = –4 mA, VI = VIH 1.
PAGE 7
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX B 1.7 6.7 1.9 6.3 1.8 5.
PAGE 8
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) A B tpd ten OE tdis OE VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX MIN MAX B 1.5 5.9 1.7 5.4 1.5 3.
PAGE 9
SN74AVCA164245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES395B – JULY 2002 – REVISED OCTOBER 2005 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 30 pF 30 pF 30 pF 2 kΩ 1 kΩ 500 Ω 500 Ω 0.1 V 0.15 V 0.15 V 0.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 74AVCA164245ZQLR BGA MI CROSTA R JUNI OR ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1 SN74AVCA164245GR TSSOP DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1 SN74AVCA164245VR TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) 74AVCA164245ZQLR BGA MICROSTAR JUNIOR ZQL 56 1000 336.6 336.6 28.6 SN74AVCA164245GR TSSOP DGG 48 2000 367.0 367.0 45.0 SN74AVCA164245VR TVSOP DGV 48 2000 367.0 367.0 38.
PAGE 14
PAGE 15
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 16
PAGE 17
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 18
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.