Datasheet

DESCRIPTION/ORDERING INFORMATION (CONTINUED)
DIR1
A1
OE
B1
SN74AVC4T774
SCES693B – FEBRUARY 2008 – REVISED MAY 2008 ..................................................................................................................................................... www.ti.com
The SN74AVC4T774 is designed for asynchronous communication between data buses. The logic levels of the
direction-control (DIR) input and the output-enable ( OE) input activate either the B-port outputs or the A-port
outputs or place both output ports in the high-impedance mode. The device transmits data from the A bus to the
B bus when the B outputs are activated, and from the B bus to the A bus when the A outputs are activated. The
input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to
prevent excess I
CC
and I
CCZ
.
The SN74AVC4T774 is designed so that the control pins (DIR1, DIR2, DIR3, DIR4, and OE) are supplied by
V
CCA
.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The V
CC
isolation feature ensures that if either V
CC
input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CCA
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Since this device has CMOS inputs, it is very important to not allow them to float. If the inputs are not driven to
either a high V
CC
state, or a low GND state, an undesirable larger than expected I
CC
current may result. Since
the input voltage settlement is governed by many factors (e.g. capacitance, board-layout, package inductance,
surrounding conditions, etc.), ensuring that they these inputs are kept out of erroneous switching states and tying
them to either a high or a low level minimizes the leakage-current.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
QFN – RGY Tape and reel SN74AVC4T774RGYR WT774
QFN – RSV Tape and reel SN74AVC4T774RSVR ZVK
– 40 ° C to 85 ° C
Tube SN74AVC4T774PW
TSSOP – PW WT774
Tape and reel SN74AVC4T774PWR
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
FUNCTION TABLE
(Each Bit)
CONTROL INPUTS OUTPUT CIRCUITS
OPERATION
OE DIR A PORT B PORT
L L Enabled Hi-Z B data to A data
L H Hi-Z Enabled A data to B data
H X Hi-Z Hi-Z Isolation
LOGIC DIAGRAM (POSITIVE LOGIC)
(1)
(1) Shown for a single channel
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Product Folder Link(s): SN74AVC4T774