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DESCRIPTION/ORDERING INFORMATION
136
−128−144−160
0.4
0.8
1.2
1.6
2.0
2.4
2.8
17015311910285685134170
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
T
A
= 25°C
Process = Nominal
I
OL
− Output Current − mA
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
= 1.8 V
− Output Voltage − V
OL
V
T
A
= 25°C
Process = Nominal
I
OH
− Output Current − mA
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
= 1.8 V
− Output Voltage − V
OH
V
−80−96−112 −32−48−64 0−16
SN74AVC16374
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES158H – DECEMBER 1998 – REVISED MARCH 2005
• Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
• Member of the Texas Instruments Widebus™
Family • I
off
Supports Partial-Power-Down Mode
Operation
• EPIC™ (Enhanced-Performance Implanted
CMOS) Submicron Process • ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
• DOC™ (Dynamic Output Control) Circuit
– 200-V Machine Model (A115-A)
Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without Speed • Latch-Up Performance Exceeds 100 mA Per
Degradation JESD 78, Class II
• Dynamic Drive Capability Is Equivalent to • Package Options Include Plastic Thin Shrink
Standard Outputs With I
OH
and I
OL
of ± 24 mA Small-Outline (DGG) and Thin Very
at 2.5-V V
CC
Small-Outline (DGV) Packages
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows
typical V
OL
vs I
OL
and V
OH
vs I
OH
curves to illustrate the output impedance and drive capability of the circuit. At
the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC) Circuitry
Technology and Applications, literature number SCEA009.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
TSSOP – DGG Tape and reel SN74AVC16374DGGR AVC16374
–40 ° C to 85 ° C TVSOP – DGV Tape and reel SN74AVC16374DGVR CVA374
VFBGA – GQL Tape and reel SN74AVC16374GQLR CVA374
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Figure 1. Output Voltage vs Output Current
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, EPIC, DOC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.