Datasheet

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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
DGG OR DGV PACKAGE
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1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
SN74AVC16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES141N – JULY 1998 – REVISED MARCH 2005
This 16-bit buffer/driver is operational at 1.2-V to 3.6-V V
CC
, but is designed specifically for 1.65-V to 3.6-V V
CC
operation.
The SN74AVC16244 is designed specifically to improve the performance and density of 3-state memory address
drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and
symmetrical active-low output-enable ( OE) inputs.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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