Datasheet

Y + A • B or Y + A ) B

SN74AUP2G08

SCES681D –JANUARY 2008–REVISED OCTOBER 2010

www.ti.com

This dual 2-input positive-AND gate performs the Boolean function in positive logic.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

(1)

PACKAGE

(2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

(3)

NanoStar™ – WCSP (DSBGA)

Reel of 3000 SN74AUP2G08YFPR _ _ _ HE_

0.23-mm Large Bump – YFP

NanoStar™ – WCSP (DSBGA)

Reel of 3000 SN74AUP2G08YZPR _ _ _ HE_

0.23-mm Large Bump – YZP (Pb-free)

–40°C to 85°C

X2SON – DQE Reel of 5000 SN74AUP2G08DQER PR

QFN – RSE Reel of 5000 SN74AUP2G08RSER PR

VSSOP – DCU Reel of 3000 SN74AUP2G08DCUR H08_

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(3) YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

DCU: The actual top-side marking has one additional character to denote wafer fab/assembly site.

FUNCTION TABLE

INPUTS

OUTPUT

A B

L L L

L H L

H L L

H H H

LOGIC DIAGRAM (POSITIVE LOGIC)

Pin numbers shown are for DCU, YFP, and YZP packages.

Product Folder Link(s): SN74AUP2G08