Datasheet

A
Y
C
1
2
3
6
5
4
A
Y
C
V
CC
A
Y
C
A
Y
C
1
2
3
6
5
4
A
Y
C
V
CC
A
Y
C
1
2
3
6
5
4
B
Y
C
V
CC
Y
B
C
1
2
3
6
5
4
Y
V
CC
YA
GND
A
SN74AUP1T57
www.ti.com SCES611G –OCTOBER 2004–REVISED MAY 2010
Figure 7. 14+00/14+32: 2-Input NAND Gate With Inverted C Input
2-Input OR Gate With Inverted Input
Figure 8. 02/14+08: 2-Input OR Gate
2-Input AND Gate With Both Inputs Inverted
Figure 9. 86+04: 2-Input XNOR Gate
Figure 10. 04/14: Inverter
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