Datasheet

3
1
6
C
B
A
4
Y
B
Y
C
1
2
3
6
5
4
B
Y
C
V
CC
B
Y
C
SN74AUP1T57
SCES611G OCTOBER 2004REVISED MAY 2010
www.ti.com
FUNCTION TABLE
INPUTS
OUTPUT
Y
C B A
L L L H
L L H L
L H L H
L H H L
H L L L
H L H L
H H L H
H H H H
LOGIC DIAGRAM (POSITIVE LOGIC)
LOGIC CONFIGURATIONS
Figure 5. 08/14+2: 2-Input AND Gate
2-Input NOR Gate With Both Inputs Inverted
Figure 6. 14+00/14+32: 2-Input NAND Gate With Inverted B Input
2-Input OR Gate With Inverted Input
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