Datasheet

A
Y
B
1
2
3
6
5
4
A
Y
B
V
CC
A
Y
B
A
Y
B
1
2
3
6
5
4
A
Y
B
V
CC
A
Y
B
A
Y
B
1
2
3
6
5
4
A
Y
B
V
CC
A
Y
B
A
Y
B
1
2
3
6
5
4
A
Y
B
V
CC
A
Y
B
1
2
3
6
5
4
A
Y
B
V
CC
Y
A
B
SN74AUP1G57
www.ti.com SCES503I –NOVEMBER 2003–REVISED MAY 2010
FUNCTION SELECTION TABLE
LOGIC FUNCTION FIGURE NO.
2-input AND 1
2-input AND with both inputs inverted 4
2-input NAND with inverted input 2, 3
2-input OR with inverted input 2, 3
2-input NOR 4
2-input NOR with both inputs inverted 1
2-input XNOR 5
LOGIC CONFIGURATIONS
Figure 1. 2-Input AND Gate Figure 2. 2-Input NAND Gate With Inverted A Input
Figure 3. 2-Input NAND Gate With Inverted B Input Figure 4. 2-Input NOR Gate
Figure 5. 2-Input XNOR Gate
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