Datasheet

AUP
LVC
AUP
AUP
LVC
Static-PowerConsumption
( A)m
Dynamic-PowerConsumption
(pF)
Single,dual,andtriplegates.
†
3.3-V
Logic
†
3.3-V
Logic
†
0%
20%
40%
60%
80%
100%
0%
20%
40%
60%
80%
100%
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
0 5
10 15
20
25
30
35 40 45
Time-ns
Voltage - V
†
AUP1G08dataatCL =15pF.
Output
Input
SwitchingCharacteristics
at25MHz
†
A Y
OE
1
2 4
SN74AUP1G240
SCES627C –MARCH 2005–REVISED MAY 2010 www.ti.com
Figure 1. AUP – The Lowest-Power Family Figure 2. Excellent Signal Integrity
This buffer/driver is a single line driver with a 3-state output. The output is disabled when the output-enable (OE)
input is high. This device has the input-disable feature, which allows floating input signals.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
(1)
ORDERABLE PART TOP-SIDE
T
A
PACKAGE
(2)
NUMBER MARKING
(3)
NanoStar – WCSP (DSBGA)
Reel of 3000 SN74AUP1G240YFPR _ _ _HK_
0.23-mm large bump – YFP
NanoStar – WCSP (DSBGA)
Reel of 3000 SN74AUP1G240YZPR _ _ _HK_
0.23-mm large bump – YZP (Pb-free)
–40°C to 85°C
QFN – DRY Reel of 5000 SN74AUP1G240DRYR HK
uQFN – DSF Reel of 5000 SN74AUP1G240DSFR HK
SOT (SOT-23) – DBV Reel of 3000 SN74AUP1G240DBVR H40_
SOT (SC-70) – DCK Reel of 3000 SN74AUP1G240DCKR HK_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUTS
OUTPUT
Y
OE A
L H L
L L H
H X
(1)
Z
(1) Floating inputs allowed.
LOGIC DIAGRAM (POSITIVE LOGIC)
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Product Folder Link(s): SN74AUP1G240