Datasheet

SN74SSTL32867
26-BIT REGISTERED BUFFER
WITH SSTL_2 INPUTS AND LVCMOS OUTPUTS
DESIGN GOAL
SCES240A – APRIL 1999 – REVISED MAY 1999
6–23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 4)
MIN NOM MAX UNIT
V
CC
Supply voltage V
DDQ
2.7 V
V
DDQ
Output supply voltage 2.3 2.7 V
V
REF
Reference voltage (V
REF
= V
DDQ
/2) 1.15 1.25 1.35 V
V
TT
Termination voltage V
REF
–40mV V
REF
V
REF
+40mV V
V
I
Input voltage 0 V
CC
V
V
IH
AC high-level input voltage Data input V
REF
+350mV V
V
IL
AC low-level input voltage Data input V
REF
–350mV V
V
IH
DC high-level input voltage Data input V
REF
+180mV V
V
IL
DC low-level input voltage Data input V
REF
–180mV V
V
IH
High-level input voltage RESET 1.7 V
V
IL
Low-level input voltage RESET 0.7 V
V
ICR
Common-mode input voltage range CLK, CLK 0.97 1.53 V
V
I(PP)
Peak-to-peak input voltage CLK, CLK 360 mV
I
OH
High-level output current –8
I
OL
Low-level output current 8
mA
T
A
Operating free-air temperature 0 70 _C
NOTE 4: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP
†
MAX UNIT
V
IK
I
I
= –18 mA 2.3 V –1.2 V
I
OH
= –100 µA 2.3 V to 2.7 V V
CC
–0.2
V
OH
I
OH
= –4 mA 2
V
I
OH
= –8 mA
2.3 V
1.7
I
OL
= 100 µA 2.3 V to 2.7 V 0.2
V
OL
I
OL
= 4 mA 0.3
V
I
OL
= 8 mA
2.3 V
0.6
Data inputs V
I
= 1.7 V or 0.8V V
REF
= 1.15 V or 1.35 V ±5
RESET input V
I
= 2.7 V or 0
2.7 V
±5
I
I
V
I
= 1.7 V or 0.8V ±5
µA
I
CLK, CLK
V
I
= 2.7 V or 0
V
REF
= 1.15 V or 1.35 V 2.7 V
±5
µ
±
V
REF
V
REF
= 1.15 V or 1.35 V 2.7 V
±
5
V
I
= 1.7 V or 0.8 V
I
CC
V
I
= 2.7 V or 0
I
O
= 0 2.7 V mA
RESET input
C
i
Data inputs
V
I
= 1.7 V or 0.8 V
2.5 V
†
pF
C
o
Outputs V
O
= 1.7 V or 0.8 V
2.5 V
†
pF
†
All typical values are at V
CC
= 2.5 V, T
A
= 25°C.
PRODUCT PREVIEW