Datasheet

SN74ALVCHR16269A
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES050K AUGUST 1995 REVISED FEBRUARY 1999
4138
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 1 through 3)
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
f
clock
Clock frequency
95 115 135 MHz
t
w
Pulse duration, CLK high or low
5.2 4.3 3.3 ns
A data before CLK
1.4 1.4 1
B data before CLK
1.6 1.5 1.1
t
su
Setup time
SEL
before CLK
0.8 1.1 1.3
ns
CLKENA1 or CLKENA2 before CLK
0.8 1 0.8
OE before CLK
1.7 1.6 1.2
A data after CLK
0.9 0.9 1.2
B data after CLK
0.8 0.6 1
t
h
Hold time
SEL
after CLK
1.1 0.8 1.7
ns
CLKENA1 or CLKENA2 after CLK
1.4 1 1.6
OE after CLK
0.9 0.8 1.2
This information was not available at the time of publication.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)
PARAMETER
FROM TO
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
(INPUT) (OUTPUT)
MIN TYP MIN MAX MIN MAX MIN MAX
f
max
95 115 135 MHz
B
2.3 7.7 6.9 2.2 5.8
t
pd
CLK
A
1.9 6.4 5.8 2 5.2
ns
B
2.5 7.7 6.9 2.3 5.8
t
en
CLK
A
2.2 6.7 6 2.1 5.3
ns
B
3.3 8.1 6.7 2.4 6
t
dis
CLK
A
2.7 8 6.2 2.1 6
ns
This information was not available at the time of publication.
operating characteristics, T
A
= 25°C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 V
PARAMETER TEST CONDITIONS
TYP TYP TYP
UNIT
Power dissipation
All outputs enabled
142 172
C
pd
capacitance
All outputs disabled
C
L
= 0, f = 10 MHz
115 129
pF
This information was not available at the time of publication.