Datasheet
SN74ALVCH162334
16-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
SCES120E – JULY 1997 – REVISED FEBRUARY 1999
4–59
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus Family
D EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
D Output Port Has Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
D Designed to Comply With JEDEC 168-Pin
and 200-Pin SDRAM Buffered DIMM
Specification
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages
description
This 16-bit universal bus driver is designed for
1.65-V to 3.6-V V
CC
operation.
Data flow from A to Y is controlled by the
output-enable (OE
) input. The device operates in
the transparent mode when the latch-enable (LE
)
input is low. When LE
is high, the A data is latched if the clock (CLK) input is held at a high or low logic level.
If LE
is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the
outputs are in the high-impedance state.
The output port includes equivalent 26-Ω series resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE
should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH162334 is characterized for operation from –40°C to 85°C.
Copyright 1999, Texas Instruments Incorporated
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OE
Y1
Y2
GND
Y3
Y4
V
CC
Y5
Y6
GND
Y7
Y8
Y9
Y10
GND
Y11
Y12
V
CC
Y13
Y14
GND
Y15
Y16
NC
CLK
A1
A2
GND
A3
A4
V
CC
A5
A6
GND
A7
A8
A9
A10
GND
A11
A12
V
CC
A13
A14
GND
A15
A16
LE
NC – No internal connection
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.