Datasheet

SN74ALVC74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCES109E – JULY 1997 – REVISED JANUARY 1999
2–42
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 1 through 3)
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
f
clock
Clock frequency MHz
PRE or CLR low
t
w
Pulse duration
CLK high or low
ns
Data before CLK↑
t
su
Setup time
PRE
or CLR inactive
ns
t
h
Hold time
Data after CLK↑ ns
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)
PARAMETER
FROM TO
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
(INPUT) (OUTPUT)
TYP MIN MAX MIN MAX MIN MAX
f
max
MHz
CLK
t
pd
PRE or CLR
Q or Q
ns
operating characteristics, T
A
= 25°C
V
CC
= 1.8V V
CC
= 2.5 V V
CC
= 3.3 V
PARAMETER TEST CONDITIONS
TYP TYP TYP
UNIT
C
pd
Power dissipation capacitance per flip-flop C
L
= 0, f = 10 MHz pF
PRODUCT PREVIEW