Datasheet

SN74ALVCHR162282
18-BIT TO 36-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES087A – SEPTEMBER 1996 – REVISED FEBRUARY 1999
4–40
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Function Tables
A-TO-B STORAGE
(OE
= L, DIR = H)
INPUTS OUTPUTS
SEL CLK A 1B 2B
H X X 1B
0
†
2B
0
†
L ↑ LL
‡
X
L ↑ H H
‡
X
†
Output level before the indicated steady-state
input conditions are established
‡
Two CLK edges are needed to propagate the
data.
B-TO-A STORAGE
(OE
= L, DIR = L)
INPUTS
OUTPUT
CLK SEL 1B 2B
A
↑ H X L L
§
↑ HXH H
§
↑ LLX L
↑ L H X H
§
Two clock edges are needed to propagate the data.
The data is loaded in the first register when SEL
is low
and propagates to the second register when SEL
is
high.
OUTPUT ENABLE
INPUTS
OUTPUTS
CLK OE DIR A 1B, 2B
↑ H X Z Z
↑ LLZActive
↑ L H Active Z
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