Datasheet
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V
CC
GND
2B9
1B9
2B8
GND
1B8
2B7
1B7
V
CC
2B6
1B6
2B5
1B5
GND
2B4
1B4
2B3
1B3
V
CC
GND
2B2
1B2
2B1
1B1
V
CC
A1
A2
A3
GND
A4
A5
A6
V
CC
A7
A8
A9
GND
CLK
SEL
V
CC
GND
1B10
2B10
1B11
GND
2B11
1B12
2B12
V
CC
1B13
2B13
1B14
2B14
GND
1B15
2B15
1B16
2B16
V
CC
GND
1B17
2B17
1B18
2B18
V
CC
A18
A17
A16
GND
A15
A14
A13
V
CC
A12
A11
A10
GND
OE
DIR
DBB PACKAGE
(TOP VIEW)
SN74ALVCHR162282
18-BIT TO 36-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES087A – SEPTEMBER 1996 – REVISED FEBRUARY 1999
4–39
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D EPIC (Enhanced-Performance Implanted
CMOS) Sub-Micron Process
D Output Ports Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
D Member of the Texas Instruments
Widebus Family
D Bus-Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Packaged in Thin Shrink Small-Outline
Package
NOTE: For order entry:
The DBB package is abbreviated to G.
description
The SN74ALVCHR162282 is an 18-bit to 36-bit
registered bus exchanger designed for 1.65-V to
3.6-V V
CC
operation.
This part is intended for use in applications where
data must be transferred from a narrow
high-speed bus to a wide lower-frequency bus. It
is designed specifically for low-voltage (3.3-V)
V
CC
operation.
The device provides synchronous data exchange
between the two ports. Data is stored in the
internal registers on the low-to-high transition of
the clock (CLK) input. For data transfer in the
B-to-A direction, select (SEL
) line selects 1B or 2B
data for the A outputs.
For data transfer in the A-to-B direction, a
two-stage pipeline is provided in the 1B path, with
a single storage register in the 2B path. Data flow
is controlled by the active-low output enable (OE
)
and the control (DIR) input. The DIR control pin is
registered to synchronize the bus direction
changes with the clock.
The outputs, which are designed to sink up to
12mA, include 26-Ω resistors to reduce overshoot
and undershoot.
Active bus-hold circuitry is provided to hold
unused or floating data inputs at a valid logic level.
The SN74ALVCHR162282 is characterized for
operation from –40°C to 85°C.
PRODUCT PREVIEW
Copyright 1999, Texas Instruments Incorporated
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.