Datasheet

SN74ALVCH162268
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES018F – AUGUST 1995 – REVISED FEBRUARY 1999
4–35
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 1 through 3)
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
f
clock
Clock frequency
†
120 125 150 MHz
t
w
Pulse duration, CLK high or low
†
3.3 3.3 3.3 ns
A data before CLK↑
†
4.5 4 3.4
B data before CLK↑
†
0.8 1.2 1
SEL before CLK↑
†
1.4 1.6 1.3
t
su
Setup time
CLKENA1 or CLKENA2 before CLK↑
†
3.6 3.4 2.8
ns
CLKENB1 or CLKENB2 before CLK↑
†
3.2 3 2.5
OE before CLK↑
†
4.2 3.9 3.2
A data after CLK↑
†
0 0 0.2
B data after CLK↑
†
1.3 1.2 1.3
SEL after CLK↑
†
1 1 1
t
h
Hold time
CLKENA1
or CLKENA2 after CLK↑
†
0.1 0.1 0.4
ns
CLKENB1 or CLKENB2 after CLK↑
†
0.1 0 0.5
OE after CLK↑ after CLK↑
†
0 0 0.2
†
This information was not available at the time of publication.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)
PARAMETER
FROM TO
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
(INPUT) (OUTPUT)
MIN TYP MIN MAX MIN MAX MIN MAX
f
max
†
120 125 150 MHz
B
†
1.6 6.1 5.9 1.8 5.4
A (1B)
†
1.6 5.8 5.4 1.7 4.8
t
pd
CLK
A (2B)
†
1.6 5.8 5.3 1.8 4.8
ns
A (SEL)
†
2.5 7.3 6.5 2.4 5.8
t
en
CLK
B
†
2.7 7.2 6.8 2.6 6.1 ns
t
dis
CLK
B
†
2.8 7.2 6.1 2.5 5.9 ns
t
en
CLK
A
†
2 6.2 5.6 1.8 5.1 ns
t
dis
CLK
A
†
2 6.5 5.4 2.1 5 ns
†
This information was not available at the time of publication.
operating characteristics, T
A
= 25°C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 V
PARAMETER TEST CONDITIONS
TYP TYP TYP
UNIT
Power dissipation
Outputs enabled
†
87 120
C
pd
capacitance
Outputs disabled
C
L
= 50 pF, f = 10 MHz
†
80.5 118
pF
†
This information was not available at the time of publication.