Datasheet
SN74ALVCH16830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
SCES081B – AUGUST 1996 – REVISED FEBRUARY 1999
3–323
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus Family
D EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Plastic 300-mil Thin Shrink Small-Outline
Package
description
This 1-bit to 2-bit address driver is designed for
1.65-V to 3.6-V V
CC
operation.
Active bus-hold circuitry is provided to hold
unused or floating inputs at a valid logic level.
To ensure the high-impedance state during power
up or power down, the output-enable (OE
) input
should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the
current-sinking capability of the driver.
The SN74ALVCH16830 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS OUTPUTS
OE1 OE2 A 1Yn 2Yn
L H H H Z
L HLLZ
H LHZH
H LLZL
L LHHH
L LLLL
H H X Z Z
PRODUCT PREVIEW
Copyright 1999, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
DBB PACKAGE
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2Y2
1Y2
GND
2Y1
1Y1
V
CC
A1
A2
GND
A3
A4
GND
A5
A6
V
CC
A7
A8
GND
A9
OE1
OE2
A10
GND
A11
A12
V
CC
A13
A14
GND
A15
A16
GND
A17
A18
V
CC
2Y18
1Y18
GND
2Y17
1Y17
1Y3
2Y3
GND
1Y4
2Y4
V
CC
1Y5
2Y5
GND
1Y6
2Y6
GND
1Y7
2Y7
V
CC
1Y8
2Y8
GND
1Y9
2Y9
1Y10
2Y10
GND
1Y11
2Y11
V
CC
1Y12
2Y12
GND
1Y13
2Y13
GND
1Y14
2Y14
V
CC
1Y15
2Y15
GND
1Y16
2Y16