Datasheet

SN74ALVCH16823
18-BIT BUS-INTERFACE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES038D – JULY 1995 – REVISED FEBRUARY 1999
3–294
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 1 through 3)
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
f
clock
Clock frequency
†
150 150 150 MHz
CLR low
†
3.3 3.3 3.3
t
w
Pulse duration
CLK high or low
†
3.3 3.3 3.3
ns
CLR inactive
†
0.7 0.7 0.8
Data low before CLK↑
†
1.6 1.6 1.3
t
su
Setup time
Data high before CLK↑
†
1.1 1.1 1
ns
CLKEN low before CLK↑
†
1.9 1.9 1.5
Data low after CLK↑
†
0.5 0.5 0.5
t
h
Hold time
Data high after CLK↑
†
0.1 0.1 0.8
ns
CLKEN low after CLK↑
†
0.3 0.3 0.4
†
This information was not available at the time of publication.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)
PARAMETER
FROM TO
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
(INPUT) (OUTPUT)
MIN TYP MIN MAX MIN MAX MIN MAX
f
max
†
150 150 150 MHz
CLK
†
1 5.8 5.2 1 4.5
t
pd
CLR
Q
†
1 5.4 5.2 1.2 4.6
ns
t
en
OE
Q
†
1 6 5.7 1 4.8 ns
t
dis
OE
Q
†
1.1 5.4 4.7 1.3 4.5 ns
†
This information was not available at the time of publication.
operating characteristics, T
A
= 25°C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 V
PARAMETER TEST CONDITIONS
TYP TYP TYP
UNIT
Power dissipation
Outputs enabled
†
27 30
C
pd
capacitance
Outputs disabled
C
L
= 50 pF, f = 10 MHz
†
16 18
pF
†
This information was not available at the time of publication.