Datasheet
SN74ALVCH16344
1-BIT TO 4-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
SCES054F – SEPTEMBER 1995 – REVISED FEBRUARY 1999
3–125
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus Family
D EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages
description
This 1-bit to 4-bit address driver is designed for
1.65-V to 3.6-V V
CC
operation.
The SN74ALVCH16344 is used in applications in
which four separate memory locations must be
addressed by a single address.
To ensure the high-impedance state during power
up or power down, OE
should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold
unused or floating inputs at a valid logic level.
The SN74ALVCH16344 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUT
OE A
Bn
L H H
L LL
H H Z
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
OE1
1B1
1B2
GND
1B3
1B4
V
CC
1A
2B1
2B2
GND
2B3
2B4
2A
3A
3B1
3B2
GND
3B3
3B4
4A
V
CC
4B1
4B2
GND
4B3
4B4
OE2
OE4
8B1
8B2
GND
8B3
8B4
V
CC
8A
7B1
7B2
GND
7B3
7B4
7A
6A
6B1
6B2
GND
6B3
6B4
5A
V
CC
5B1
5B2
GND
5B3
5B4
OE3