Datasheet

SN74ALVCH16282
18-BIT TO 36-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES036C – JULY 1995 – REVISED FEBRUARY 1999
3–100
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 1 through 3)
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
f
clock
Clock frequency
†
150 150 150 MHz
t
w
Pulse duration, CLK high or low
†
3.3 3.3 3.3 ns
A data before CLK↑
†
2.4 2.3 2
B data before CLK↑
†
2.2 2.2 1.8
t
su
Setup time
DIR before CLK↑
†
2.2 2.1 1.7
ns
SEL before CLK↑
†
2 2 1.8
A data after CLK↑
†
0.5 0.5 0.7
B data after CLK↑
†
0.5 0.5 0.6
t
h
Hold time
DIR after CLK↑
†
0.5 0.5 0.5
ns
SEL after CLK↑
†
0.7 0.7 0.8
†
This information was not available at the time of publication.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)
PARAMETER
FROM TO
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
(INPUT) (OUTPUT)
MIN TYP MIN MAX MIN MAX MIN MAX
f
max
†
150 150 150 MHz
A
†
1 6.1 5.5 1.4 5
t
pd
CLK
B
†
1.2 6.3 5.7 1.6 5.3
ns
A
†
1.3 6.9 6.3 1.2 5.7
t
en
OE
B
†
2.3 8.7 8.1 2.3 7.4
ns
A
†
1.5 7 5.6 1.8 5.7
t
dis
OE
B
†
2.1 7.9 6.4 2.3 6.4
ns
†
This information was not available at the time of publication.
operating characteristics, T
A
= 25°C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 V
PARAMETER TEST CONDITIONS
TYP TYP TYP
UNIT
Outputs enabled
†
282 310
C
pd
Power dissipation capacitance
Outputs disabled
C
L
= 0, f = 10 MHz
†
208 228
pF
†
This information was not available at the time of publication.