Datasheet

SN74ALVCH16269
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES019H – JULY 1995 – REVISED FEBRUARY1999
3–50
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figures 1 through 3)
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
f
clock
Clock frequency
†
135 135 135 MHz
t
w
Pulse duration, CLK high or low
†
3.3 3.3 3.3 ns
A data before CLK↑
†
2 2 1.7
B data before CLK↑
†
2.2 2.1 1.8
t
su
Setup time
SEL
before CLK↑
†
1.6 1.6 1.3
ns
CLKENA1 or CLKENA2 before CLK↑
†
1 1.2 0.9
OE before CLK↑
†
1.5 1.6 1.3
A data after CLK↑
†
0.7 0.6 0.6
B data after CLK↑
†
0.7 0.6 0.6
t
h
Hold time
SEL
after CLK↑
†
1.1 0.7 0.7
ns
CLKENA1 or CLKENA2 after CLK↑
†
1 0.8 1.1
OE after CLK↑
†
0.8 0.8 0.8
†
This information was not available at the time of publication.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figures 1 through 3)
PARAMETER
FROM TO
V
CC
= 1.8 V
V
CC
= 2.5 V
± 0.2 V
V
CC
= 2.7 V
V
CC
= 3.3 V
± 0.3 V
UNIT
(INPUT) (OUTPUT)
MIN TYP MIN MAX MIN MAX MIN MAX
f
max
†
135 135 135 MHz
B
†
1 8.2 7.3 1 6.2
t
pd
CLK
A
†
1 6.4 5.8 1 5
ns
B
†
1 7.9 6.7 1 6.1
t
en
CLK
A
†
1 7.6 6.2 1 5.9
ns
B
†
1 8.1 6.9 1 6.1
t
dis
CLK
A
†
1 7.5 6.8 1 5.6
ns
†
This information was not available at the time of publication.
operating characteristics, T
A
= 25°C
V
CC
= 1.8 V V
CC
= 2.5 V V
CC
= 3.3 V
PARAMETER TEST CONDITIONS
TYP TYP TYP
UNIT
Power dissipation
All outputs enabled
†
87 120
C
pd
capacitance
per exchanger
All outputs disabled
C
L
= 50 pF, f = 10 MHz
†
80.5 118
pF
†
This information was not available at the time of publication.