Datasheet

www.ti.com
TIMING DIAGRAM
CLK
SEL(0−4)
SELEN
Selected
Input Port
t
su
t
h
t
su
t
h
t
su
t
h
t
pd
CLK to Output
Selected
Output Port
SN74ALVCH16409
9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES022G – JULY 1995 – REVISED OCTOBER 2004
7