Datasheet

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SN74ALVCH16409
9-BIT, 4-PORT UNIVERSAL BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES022G – JULY 1995 – REVISED OCTOBER 2004
FUNCTION TABLES
INPUTS
OUTPUT
RECEIVE PORT
CLK SEND PORT
X X B
0
(1)
X L L
X H H
↑ L L
↑ H H
H X B
0
(1)
L X B
0
(1)
(1) Output level before the indicated steady-state input conditions were
established
DATA-FLOW CONTROL
INPUTS
DATA FLOW
PRE SELEN CLK SEL0 SEL1 SEL2 SEL3 SEL4
H X X X X X X X All outputs disabled
L H ↑ X X X X X No change
L L ↑ 0 0 0 0 0 None, all I/Os off
L L ↑ 0 0 0 0 1 Not used
L L ↑ 0 0 0 1 0 Not used
L L ↑ 0 0 0 1 1 Not used
L L ↑ 0 0 1 0 0 Not used
L L ↑ 0 0 1 0 1 Not used
L L ↑ 0 0 1 1 0 Not used
L L ↑ 0 0 1 1 1 Not used
L L ↑ 0 1 0 0 0 2A to 1A and 1B to 2B
L L ↑ 0 1 0 0 1 2A to 1A
L L ↑ 0 1 0 1 0 2B to 1B
L L ↑ 0 1 0 1 1 2A to 1A and 2B to 1B
L L ↑ 0 1 1 0 0 1A to 2A and 1B to 2B
L L ↑ 0 1 1 0 1 1A to 2A
L L ↑ 0 1 1 1 0 1B to 2B
L L ↑ 0 1 1 1 1 1A to 2A and 2B to 1B
L L ↑ 1 0 0 0 0 1A to 1B and 2B to 2A
L L ↑ 1 0 0 0 1 1A to 1B
L L ↑ 1 0 0 1 0 2A to 2B
L L ↑ 1 0 0 1 1 1A to 1B and 2A to 2B
L L ↑ 1 0 1 0 0 1B to 1A and 2A to 2B
L L ↑ 1 0 1 0 1 1B to 1A
L L ↑ 1 0 1 1 0 2B to 2A
L L ↑ 1 0 1 1 1 1B to 1A and 2B to 2A
L L ↑ 1 1 0 0 0 2B to 1A and 2A to 1B
L L ↑ 1 1 0 0 1 1B to 2A
L L ↑ 1 1 0 1 0 2B to 1A
L L ↑ 1 1 0 1 1 2B to 1A and 1B to 2A
L L ↑ 1 1 1 0 0 1A to 2B and 1B to 2A
L L ↑ 1 1 1 0 1 1A to 2B
L L ↑ 1 1 1 1 0 2A to 1B
L L ↑ 1 1 1 1 1 1A to 2B and 2A to 1B
2