Datasheet

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DESCRIPTION (CONTINUED)
(1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
1Q1
2
1Q2
3
1Q3
5
1Q4
6
1Q5
8
1D
55
1D1
54
1D2
52
1D3
51
1D4
49
1D5
48
1D6
47
1D7
45
1D8
44
1D9
43
1D10
1Q6
9
1Q7
10
1Q8
12
1Q9
13
1Q10
14
3D
42
2D1
41
2D2
40
2D3
38
2D4
37
2D5
2Q1
15
2Q2
16
2Q3
17
2Q4
19
2Q5
20
36
2D6
34
2D7
33
2D8
31
2D9
30
2D10
2Q6
21
2Q7
23
2Q8
24
2Q9
26
2Q10
27
EN2
1
C1
56
1LE
EN4
28
C3
29
2LE
1OE
2OE
2
4
SN74ALVCH162841
20-BIT BUS-INTERFACE D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCES088E – OCTOBER 1996 – REVISED SEPTEMBER 2004
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.
The SN74ALVCH162841 is characterized for operation from -40 ° C to 85 ° C.
FUNCTION TABLE
(each 10-bit latch)
INPUTS
OUTPUT
Q
OE LE D
L H H H
L H L L
L L X Q
0
H X X Z
LOGIC SYMBOL
(1)
2