LOGIC DIAGRAM (POSITIVE LOGIC)
CLK
OEB
SEL
A1
1B1
2B1
CLKENA1
CLKENA2
1D 1D
CE
C1
1D
CE
C1
G1
1
1
1D
1D
CLKEN1B
C1
1D
1D
C1
CE
OEA
1D
C1
C1
CLKEN2B
1 of 12 Channels
CE
CE
C1
2
27
30
55
56
28
1
29
8
23
6
SN74ALVCH16270
12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES028G – JULY 1995 – REVISED AUGUST 2004
3
