Datasheet

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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
SN74ALVCH162374
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES092F – JANUARY 1997 – REVISED OCTOBER 2004
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
OE CLK D
L ↑ H H
L ↑ L L
L H or L X Q
0
H X X Z
2