Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Flip-Flop Standard Three-state, Inverted DIP 20







SDAS065B − DECEMBER 1982 − REVISED JANUARY 1995

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

• 3-State Buffer-Type Inverting Outputs Drive

Bus Lines Directly

• Bus-Structured Pinout

• Buffered Control Inputs

• SN74ALS577A Has Synchronous Clear

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), Standard Plastic (N, NT)

and Ceramic (J) 300-mil DIPs, and Ceramic

Flat (W) Packages

description

These octal D-type edge-triggered flip-flops

feature 3-state outputs designed specifically for

bus driving. They are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

These flip-flops enter data on the low-to-high

transition of the clock (CLK) input.

The output-enable (OE

) input does not affect

internal operations of the flip-flops. Old data can

be retained or new data can be entered while the

outputs are disabled.

The SN54ALS576B and SN54AS576 are

characterized for operation over the full military

temperature range of −55°C to 125°C. The

SN74ALS576B, SN74ALS577A, and

SN74AS576 are characterized for operation from

0°C to 70°C.

SN54ALS576B, SN54AS576 ...J OR W PACKAGE

SN74ALS576B, SN74AS576 . . . DW OR N PACKAGE

(TOP VIEW)

SN54ALS576B, SN54AS576 . . . FK PACKAGE

(TOP VIEW)

SN74ALS577A . . . DW OR NT PACKAGE

(TOP VIEW)

NC − No internal connection

GND

CLK

3212019

910111213

7Q 1Q

GND

CLK

CLR

GND

CLK

  !"#$ % &'!!($ #%  )'*+&#$ ,#$(-

!,'&$% &!" $ %)(&&#$% )(! $.( $(!"%  (/#% %$!'"($%

%$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',(

$(%$2  #++ )#!#"($(!%-

Summary of content (23 pages)

PAGE 1
SDAS065B − DECEMBER 1982 − REVISED JANUARY 1995 • • • • SN54ALS576B, SN54AS576 . . . J OR W PACKAGE SN74ALS576B, SN74AS576 . . .
PAGE 2
SDAS065B − DECEMBER 1982 − REVISED JANUARY 1995 Function Tables ′ALS576B, ′AS576 (each flip-flop) INPUTS OE CLK D OUTPUT Q L ↑ H L L ↑ L H L L X Q0 H X X Z SN74ALS577A (each flip-flop) INPUTS OE CLR CLK D OUTPUT Q L L ↑ X H L H ↑ H L L H ↑ L H L H L X Q0 H X X X Z logic symbols† ′ALS576B, ′AS576 OE CLK 1D 2D 3D 4D 5D 6D 7D 8D 1 11 2 SN74ALS577A
PAGE 3
SDAS065B − DECEMBER 1982 − REVISED JANUARY 1995 logic diagrams (positive logic) ′ALS576B, ′AS576 SN74ALS577A 1 OE OE 11 CLK CLK C1 2 1D 19 CLR 2 14 1 1Q 1D C1 1D 3 22 1Q 1D To Seven Other Channels To Seven Other Channels Pin numbers shown are for the DW, J, N, and W packages. Pin numbers shown are for the DW and NT packages.
PAGE 4
SDAS065B − DECEMBER 1982 − REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TYP† MIN VIK VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = − 18 mA IOH = − 0.4 mA VCC = 4.5 V IOH = − 1 mA IOH = − 2.6 mA VOL VCC = 4.5 V IOL = 12 mA IOL = 24 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.
PAGE 5
SDAS065B − DECEMBER 1982 − REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 6
SDAS065B − DECEMBER 1982 − REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK SN54AS576 TYP† MAX TEST CONDITIONS MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = − 18 mA IOH = − 2 mA VCC = 4.5 V IOH = − 12 mA IOH = − 15 mA VOL VCC = 4.5 V IOL = 32 mA IOL = 48 mA IOZH IOZL VCC = 5.5 V, VCC = 5.
PAGE 7
SDAS065B − DECEMBER 1982 − REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS 3.5 V High-Level Pulse 1.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74ALS576BDWR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DW 20 2000 330.0 24.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.8 13.0 2.7 12.0 24.0 Q1 SN74ALS576BNSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74ALS577ADWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ALS576BDWR SOIC DW 20 2000 367.0 367.0 45.0 SN74ALS576BNSR SO NS 20 2000 367.0 367.0 45.0 SN74ALS577ADWR SOIC DW 24 2000 367.0 367.0 45.
PAGE 14
PAGE 15
PAGE 16
PAGE 17
PAGE 18
PAGE 19
PAGE 20
PAGE 21
PAGE 22
PAGE 23
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.