Datasheet

SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Function Tables
SN54ALS574B, SN74ALS574B, SN54AS574, SN74AS574
(each flip-flop)
INPUTS
OUTPUT
OE CLK D
Q
L H H
L LL
LLX Q
0
HXX Z
SN74ALS575A, SN54AS575, SN74AS575
(each flip-flop)
INPUTS
OUTPUT
OE CLR CLK D
Q
L L X L
L H HH
LHLL
LHLX Q
0
HXHX Z
logic symbols
OE
1D
2
1D
3
2D
4
3D
5
4D
6
5D
11
CLK
1Q
19
2Q
18
3Q
17
4Q
16
5Q
15
6Q
14
7Q
13
8Q
12
7
6D
8
7D
9
8D
EN
1
C1
OE
1D
3
1D
4
2D
5
3D
6
4D
7
5D
14
CLK
1Q
22
2Q
21
3Q
20
4Q
19
5Q
18
6Q
17
7Q
16
8Q
15
8
6D
9
7D
10
8D
EN
2
C1
CLR
1R
1
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
SN74ALS575A, SN54AS575,
SN74AS575
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, J, JT, N, and NT packages.