Datasheet

SN74ALS29827, SN74ALS29828
10-BIT BUFFERS AND BUS DRIVERS
WITH 3-STATE OUTPUTS
SDAS095B – JANUARY 1986 – REVISED JANUARY 1995
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
LOAD CIRCUIT
R1
1 kΩ
All Diodes
1N916 or 1N3064
From Output
Under Test
Test Point
S2
C
L
(see Note A)
R
L
= 180 Ω
1.5 V
1.5 V
1.5 V
3 V
3 V
0
0
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing Input
Data Input
1.5 V
1.5 V
3 V
3 V
0
0
High-Level
Pulse
Low-Level
Pulse
t
w
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.5 V
1.5 V
t
PHL
t
PLH
t
PLH
t
PHL
Out-of-Phase
Output
1.5 V 1.5 V
1.5 V1.5 V
1.5 V 1.5 V
3 V
0
V
OL
V
OH
V
OH
V
OL
In-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
t
PHZ
t
PLZ
0.5 V
t
PZL
t
PZH
1.5 V1.5 V
1.5 V
1.5 V
3 V
0
Output
Control
Waveform 1
(see Note B)
Waveform 2
(see Note B)
≈ 0
V
OH
V
OL
≈ 1.5 V
0.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
V
CC
S1
SWITCH POSITION TABLE
TEST S1 S2
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Closed
Closed
Open
Closed
Closed
Closed
Closed
Closed
Closed
Open
Closed
Closed
≈ 4.5 V
≈ 1.5 V
Input
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z
O
= 50 Ω, t
r
≤ 2.5 ns, t
f
≤ 2.5 ns.
Figure 1. Load Circuit and Voltage Waveforms