Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver PDIP 20

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SDAS153E − DECEMBER 1982 − REVISED AUGUST 1995

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

• 3-State Outputs Drive Bus Lines or Buffer

Memory Address Registers

• pnp Inputs Reduce dc Loading

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic (N)

and Ceramic (J) 300-mil DIPs

description

These octal buffers/drivers are designed

specifically to improve the performance and

density of 3-state memory address drivers, clock

drivers, and bus-oriented receivers and

transmitters. The designer has a choice of

selected combinations of inverting and

noninverting outputs, symmetrical active-low

output-enable (OE

) inputs, and complementary

OE and OE

inputs. These devices feature high

fan-out and improved fan-in.

The -1 version of SN74ALS241C is identical to the

standard version, except that the recommended

maximum I

of the -1 version is 48 mA. There is

no -1 version of the SN54ALS241C.

The SN54ALS241C and SN54AS241A are

characterized for operation over the full military

temperature range of −55°C to 125°C. The

SN74ALS241C and SN74AS241A are

characterized for operation from 0°C to 70°C.

FUNCTION TABLES

INPUTS

OUTPUT

1OE 1A

OUTPUT

L H H

L LL

H X Z

INPUTS

OUTPUT

2OE 2A

OUTPUT

H H H

H LL

L X Z

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

SN54ALS241C, SN54AS241A...J PACKAGE

SN74ALS241C, SN74AS241A...DW OR N PACKAGE

(TOP VIEW)

3 2 1 20 19

910111213

1Y1

2A4

1Y2

2A3

1Y3

1A2

2Y3

1A3

2Y2

1A4

SN54ALS241C, SN54AS241A...FK PACKAGE

(TOP VIEW)

2Y4

1A1

1OE

1Y4

2A2 2OE

2Y1

2A1

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Summary of content (18 pages)

PAGE 1
SDAS153E − DECEMBER 1982 − REVISED AUGUST 1995 • • SN54ALS241C, SN54AS241A . . . J PACKAGE SN74ALS241C, SN74AS241A . . .
PAGE 2
logic symbol† logic diagram (positive logic) SDAS153E − DECEMBER 1982 − REVISED AUGUST 1995 1OE 1A1 1A2 1A3 1A4 1 1 1OE EN 2 18 4 16 6 14 8 12 1A1 1Y1 2OE 2A1 2A2 2A3 2A4 18 4 16 6 14 8 12 1Y1 1Y2 1Y3 1A2 1Y2 1Y4 1A3 19 2 1Y3 EN 11 9 13 7 15 5 17 3 1A4 1Y4 2Y1 2Y2 19 2Y3 2OE 2Y4 2A1 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PAGE 3
SDAS153E − DECEMBER 1982 − REVISED AUGUST 1995 recommended operating conditions SN54ALS241C SN74ALS241C MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.7 0.
PAGE 4
SDAS153E − DECEMBER 1982 − REVISED AUGUST 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) VCC = 4.5 V to 5.
PAGE 5
SDAS153E − DECEMBER 1982 − REVISED AUGUST 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54AS241A TYP† MAX TEST CONDITIONS MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = − 18 mA IOH = − 2 mA VCC = 4.5 V IOH = − 3 mA IOH = − 12 mA VOL VCC = 4.5 V IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, II IIH VCC = 5.5 V, VCC = 5.
PAGE 6
SDAS153E − DECEMBER 1982 − REVISED AUGUST 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS 3.5 V High-Level Pulse 1.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ALS241CDWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74ALS241CNSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ALS241CDWR SOIC DW 20 2000 367.0 367.0 45.0 SN74ALS241CNSR SO NS 20 2000 367.0 367.0 45.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.