Datasheet

 
    
    
SDAS211C − DECEMBER 1982 − REVISED JULY 1996
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
typical clear, load, and count sequence
the following sequence is illustrated below:
1. Clear outputs to zero
2. Load (preset) to binary 13
3. Count up to 14, 15 (carry), 0, 1, and 2
4. Count down to 1, 0 (borrow), 15, 14, and 13
0
A
B
C
D
UP
DOWN
Q
A
Q
D
Q
C
Q
B
Count Up Count Down
13 0 2110
Data
Inputs
CLR
Data
Outputs
LOAD
CO
BO
14 15 15 14 13
Sequence
Illustrated
Clear Preset
NOTES: A. Clear overrides load, data, and count inputs.
B. When counting up, count-down input must be high; when counting down, count-up input must be high.