Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate and inverter NAND gate 74AHCT TSSOP 14

SN54AHCT132, SN74AHCT132

QUADRUPLE POSITIVE-NAND GATES

WITH SCHMITT-TRIGGER INPUTS

SCLS366G – MAY 1997 – REVISED APRIL 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Inputs Are TTL-Voltage Compatible

Operation From Very Slow Input

Transitions

Temperature-Compensated Threshold

Levels

High Noise Immunity

Same Pinouts as ’AHCT00

Latch-Up Performance Exceeds 250 mA Per

JESD 17

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

description

The ’AHCT132 devices are quadruple

positive-NAND gates.

These devices perform the Boolean function

Y = A

• B or Y = A + B in positive logic.

Each circuit functions as a NAND gate, but

because of the Schmitt action, it has different input

threshold levels for positive- and negative-going

signals.

These circuits are temperature compensated and

can be triggered from the slowest of input ramps

and still give clean jitter-free output signals.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74AHCT132N SN74AHCT132N

SOIC – D

Tube SN74AHCT132D

AHCT132

SOIC

–

Tape and reel SN74AHCT132DR

AHCT132

–40°C to 85°C

SOP – NS Tape and reel SN74AHCT132NSR AHCT132

SSOP – DB Tape and reel SN74AHCT132DBR HB132

TSSOP – PW Tape and reel SN74AHCT132PWR HB132

TVSOP – DGV Tape and reel SN74AHCT132DGVR HB132

CDIP – J Tube SNJ54AHCT132J SNJ54AHCT132J

–55°C to 125°C

CFP – W Tube SNJ54AHCT132W SNJ54AHCT132W

LCCC – FK Tube SNJ54AHCT132FK SNJ54AHCT132FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54AHCT132 ...J OR W PACKAGE

SN74AHCT132 . . . D, DB, DGV, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

GND

SN54AHCT132 . . . FK PACKAGE

(TOP VIEW)

NC – No internal connection

GND

Summary of content (10 pages)

PAGE 1
SN54AHCT132, SN74AHCT132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS366G – MAY 1997 – REVISED APRIL 2002 D D D D D SN54AHCT132 . . . J OR W PACKAGE SN74AHCT132 . . .
PAGE 2
SN54AHCT132, SN74AHCT132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS366G – MAY 1997 – REVISED APRIL 2002 FUNCTION TABLE (each gate) INPUTS OUTPUT Y A B H H L L X H X L H logic diagram, each gate (positive logic) A Y B absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.
PAGE 3
SN54AHCT132, SN74AHCT132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS366G – MAY 1997 – REVISED APRIL 2002 recommended operating conditions (see Note 3) SN54AHCT132 SN74AHCT132 MIN MAX MIN MAX UNIT VCC VI Supply voltage 4.5 5.5 4.5 5.5 V Input voltage 0 5.5 0 5.
PAGE 4
SN54AHCT132, SN74AHCT132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS366G – MAY 1997 – REVISED APRIL 2002 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A or B Y CL = 15 pF tPLH tPHL A or B Y CL = 50 pF MIN TA = 25°C TYP MAX SN54AHCT132 SN74AHCT132 MIN MAX MIN MAX 5.5* 8* 1* 9* 1 9 4.5* 6* 1* 7* 1 7 6.
PAGE 5
SN54AHCT132, SN74AHCT132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS366G – MAY 1997 – REVISED APRIL 2002 PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point S1 VCC Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.5 V th tsu 3V 1.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AHCT132DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74AHCT132DGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74AHCT132DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AHCT132DBR SSOP DB 14 2000 367.0 367.0 38.0 SN74AHCT132DGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74AHCT132DR SOIC D 14 2500 367.0 367.0 38.0 SN74AHCT132NSR SO NS 14 2000 367.0 367.0 38.0 SN74AHCT132PWR TSSOP PW 14 2000 367.0 367.0 35.
PAGE 10
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.