Datasheet

SN74AHC08Q-Q1
QUADRUPLE 2-INPUT POSITIVE-AND GATE
SGDS010C − SEPTEMBER 1998 − REVISED APRIL 2008
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Qualified for Automotive Applications
D Operating Range 2-V to 5.5-V V
CC
D EPIC (Enhanced-Performance Implanted
CMOS) Process
D Latch-Up Performance Exceeds 250 mA
Per JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
description
This device is a quadruple 2-input positive-AND gate that performs the Boolean function
Y + A • BorY+ A
) B in positive logic.
ORDERING INFORMATION
{
T
A
PACKAGE
‡
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
40°C to 125°C
SOIC − D Tape and reel SN74AHC08QDRQ1 AHC08Q
−40°C to 125°C
TSSOP − PW Tape and reel SN74AHC08QPWRQ1 HA08Q
†
For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI web site at http://www.ti.com.
‡
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A B
OUTPUT
Y
H H H
L XL
X L L
logic diagram (positive logic)
A
B
Y
Copyright  2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
D OR PW PACKAGE
(TOP VIEW)