Datasheet

SN54ACT574, SN74ACT574
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS537D − OCTOBER 1995 − REVISED NOVEMBER 2002
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% V
CC
3 V
3 V
0 V
0 V
t
h
t
su
VOLTAGE WAVEFORMS
Data Input
t
PLH
t
PHL
V
OH
V
OL
3 V
0 V
Input
Output
Timing Input
50% V
CC
From Output
Under Test
C
L
= 50 pF
(see Note A)
LOAD CIRCUIT
S1
2 × V
CC
500 Ω
500 Ω
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × V
CC
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
≈V
CC
0 V
50% V
CC
V
OL
+ 0.3 V
50% V
CC
≈0 V
Open
VOLTAGE WAVEFORMS
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
2 × V
CC
Open
TEST S1
3 V
0 V
t
w
VOLTAGE WAVEFORMS
Input
V
OH
− 0.3 V
3 V
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z
O
= 50 Ω, t
r
≤ 2.5 ns, t
f
≤ 2.5 ns.
D. The outputs are measured one at a time with one input transition per measurement.
VOLTAGE WAVEFORMS
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
Figure 1. Load Circuit and Voltage Waveforms