Datasheet

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SN54ACT533, SN74ACT533

OCTAL TRANSPARENT D-TYPE LATCHES

WITH 3-STATE OUTPUTS

SCAS553C – NOVEMBER 1995 – REVISED OCTOBER 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

4.5-V to 5.5-V V

Operation

Inputs Accept Voltages to 5.5 V

Max t

of 11 ns at 5 V

Inputs Are TTL-Voltage Compatible

3-State Inverting Outputs Drive Bus Lines

Directly

description/ordering information

The ’ACT533 devices are octal transparent

D-type latches with 3-state outputs. When the

latch-enable (LE) input is high, the Q

outputs

follow the complements of the data (D) inputs.

When LE is taken low, the Q

outputs are latched

at the inverted levels set up at the D inputs.

A buffered output-enable (OE

) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the

high-impedance state. In the high-impedance

state, the outputs neither load nor drive the bus

lines significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without need for interface or pullup

components.

does not affect the internal operations of the

latches. Old data can be retained or new data can

be entered while the outputs are in the

high-impedance state.

To ensure the high-impedance state during power up or power down, OE

should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74ACT533N SN74ACT533N

SOIC DW

Tube SN74ACT533DW

ACT533

40°Cto85°C

SOIC

–

Tape and reel SN74ACT533DWR

ACT533

–

40°C

85°C

SOP – NS Tape and reel SN74ACT533NSR ACT533

SSOP – DB Tape and reel SN74ACT533DBR AD533

TSSOP – PW Tape and reel SN74ACT533PWR AD533

CDIP – J Tube SNJ54ACT533J SNJ54ACT533J

–55°C to 125°C

CFP – W Tube SNJ54ACT533W SNJ54ACT533W

LCCC – FK Tube SNJ54ACT533K SNJ54ACT533FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

SN54ACT533 ...J OR W PACKAGE

SN74ACT533 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

10 11 12 13

SN54ACT533 . . . FK PACKAGE

(TOP VIEW)

GND

Summary of content (10 pages)

PAGE 1
SN54ACT533, SN74ACT533 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCAS553C – NOVEMBER 1995 – REVISED OCTOBER 2002 SN54ACT533 . . . J OR W PACKAGE SN74ACT533 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) 4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.
PAGE 2
SN54ACT533, SN74ACT533 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCAS553C – NOVEMBER 1995 – REVISED OCTOBER 2002 FUNCTION TABLE (each latch) INPUTS OUTPUT Q OE LE D L H H L L H L H L L X Q0 H X X Z logic diagram (positive logic) 1 OE LE 11 C1 1D 2 1Q 3 1D To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
SN54ACT533, SN74ACT533 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCAS553C – NOVEMBER 1995 – REVISED OCTOBER 2002 recommended operating conditions (see Note 3) SN54ACT533 MAX MIN MAX 4.5 5.5 4.5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 VO IOH Output voltage 0 High-level output current IOL ∆t/∆v Low-level output current High-level input voltage SN74ACT533 MIN 2 2 V V 0.8 Input transition rise or fall rate UNIT 0.
PAGE 4
SN54ACT533, SN74ACT533 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCAS553C – NOVEMBER 1995 – REVISED OCTOBER 2002 switching characteristics over recommended operating VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL D Q tPLH tPHL LE Q tPZH tPZL OE Q tPHZ tPLZ OE Q free-air TA = 25°C MIN MAX temperature SN54ACT533 MIN SN74ACT533 MAX MIN MAX 2.5 10.5 1.5 13 2 11.5 2.5 10 1.5 12.5 2 11 2.5 10.5 1.
PAGE 5
SN54ACT533, SN74ACT533 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCAS553C – NOVEMBER 1995 – REVISED OCTOBER 2002 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test CL = 50 pF (see Note A) Open 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC Open 3V 1.5 V Timing Input LOAD CIRCUIT 0V th tsu 3V 1.5 V Data Input tw 0V 3V 1.5 V Input 1.5 V VOLTAGE WAVEFORMS 1.5 V 0V VOLTAGE WAVEFORMS Output Control (low-level enabling) 3V 1.5 V 1.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.com 20-Aug-2011 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74ACT533PWR Package Package Pins Type Drawing TSSOP PW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 16.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 7.1 1.6 8.0 W Pin1 (mm) Quadrant 16.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ACT533PWR TSSOP PW 20 2000 367.0 367.0 38.
PAGE 10
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