Datasheet
SN54AC573, SN74AC573
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS542D - OCTOBER 1995 − REVISED OCTOBER 2003
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54AC573 SN74AC573
UNIT
MIN MAX MIN MAX
UNIT
V
CC
Supply voltage 2 6 2 6 V
V
CC
= 3 V 2.1 2.1
V
IH
High-level input voltage
V
CC
= 4.5 V 3.15 3.15
V
V
IH
High level
input
voltage
V
CC
= 5.5 V 3.85 3.85
V
V
CC
= 3 V 0.9 0.9
V
IL
Low-level input voltage
V
CC
= 4.5 V 1.35 1.35
V
V
IL
Low level
input
voltage
V
CC
= 5.5 V 1.65 1.65
V
V
I
Input voltage 0 V
CC
0 V
CC
V
V
O
Output voltage 0 V
CC
0 V
CC
V
V
CC
= 3 V −12 −12
I
OH
High-level output current
V
CC
= 4.5 V −24 −24
mA
I
OH
High level
output
current
V
CC
= 5.5 V −24 −24
mA
V
CC
= 3 V 12 12
I
OL
Low-level output current
V
CC
= 4.5 V 24 24
mA
I
OL
Low level
output
current
V
CC
= 5.5 V 24 24
mA
Δt/Δv Input transition rise or fall rate 8 8 ns/V
T
A
Operating free-air temperature −55 125 −40 85 °C
NOTE 3: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
T
A
= 25°C SN54AC573 SN74AC573
UNIT
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX MIN MAX MIN MAX
UNIT
3 V 2.9 2.9 2.9
I
OH
= −50 μA
4.5 V 4.4 4.4 4.4
I
OH
50
μA
5.5 V 5.4 5.4 5.4
V
OH
I
OH
= −12 mA 3 V 2.58 2.48 2.48
V
V
OH
I 24 mA
4.5 V 3.94 3.8 3.8
V
I
OH
= −24 mA
5.5 V 4.94 4.8 4.8
I
OH
= −75 mA
†
5.5 V 3.85 3.85
3 V 0.1 0.1 0.1
I
OL
= 50 μA
4.5 V 0.1 0.1 0.1
I
OL
50
μA
5.5 V 0.1 0.1 0.1
V
OL
I
OL
= 12 mA 3 V 0.36 0.44 0.44
V
V
OL
I 24 mA
4.5 V 0.36 0.44 0.44
V
I
OL
= 24 mA
5.5 V 0.36 0.44 0.44
I
OL
= 75 mA 5.5 V 1.65 1.65
I
I
V
I
= V
CC
or GND 5.5 V ±0.1 ±1 ±1 μA
I
OZ
V
O
= V
CC
or GND 5.5 V ±0.25 ±5 ±2.5 μA
I
CC
V
I
= V
CC
or GND, I
O
= 0 5.5 V 4 80 40 μA
C
i
V
I
= V
CC
or GND 5 V 5 pF
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
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design phase of development. Characteristic data and other
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change or discontinue these products without notice.