Datasheet

SN54ABTH162260, SN74ABTH162260
12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCHES
WITH SERIES-DAMPING RESISTORS AND 3-STATE OUTPUTS
SCBS240D – JUNE 1992 – REVISED MAY 1997
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
C1
1D
C1
1D
C1
1D
C1
1D
To 11 Other Channels
LE1B
LE2B
LEA1B
LEA2B
OE2B
OE1B
OEA
SEL
A1
1B1
2B1
27
2
30
55
56
29
1
28
8
23
6
G1
1
1