Datasheet

SN54ABT8245, SN74ABT8245
SCAN TEST DEVICES
WITH OCTAL BUS TRANSCEIVERS
SCBS124D – AUGUST 1992 – REVISED DECEMBER 1996
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
data register description
boundary-scan register
The boundary-scan register (BSR) is 36 bits long. It contains one boundary-scan cell (BSC) for each
normal-function input pin, two BSCs for each normal-function I/O pin (one for input data and one for output data),
and one BSC for each of the internally decoded output-enable signals (OEA and OEB). The BSR is used 1) to
store test data that is to be applied internally to the inputs of the normal on-chip logic and/or externally to the
device output pins, and/or 2) to capture data that appears internally at the outputs of the normal on-chip logic
and/or externally at the device input pins.
The source of data to be captured into the BSR during Capture-DR is determined by the current instruction. The
contents of the BSR can change during Run-Test/Idle as determined by the current instruction. At power up
or in Test-Logic-Reset, the value of each BSC is reset to logic 0.
When external data is to be captured, the BSCs for signals OEA and OEB capture logic values determined by
the following positive-logic equations:
OEA = OE
• DIR, and OEB = OE • DIR
. When data is to be applied
externally, these BSCs control the drive state (active or high-impedance) of their respective outputs.
The BSR order of scan is from TDI through bits 35–0 to TDO. Table 1 shows the BSR bits and their associated
device pin signals.
Table 1. Boundary-Scan Register Configuration
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
BSR BIT
NUMBER
DEVICE
SIGNAL
35 OEB 31 B8-I 23 B8-O 15 A8-I 7 A8-O
34 OEA 30 B7-I 22 B7-O 14 A7-I 6 A7-O
33 DIR 29 B6-I 21 B6-O 13 A6-I 5 A6-O
32 OE 28 B5-I 20 B5-O 12 A5-I 4 A5-O
–– –– 27 B4-I 19 B4-O 11 A4-I 3 A4-O
–– –– 26 B3-I 18 B3-O 10 A3-I 2 A3-O
–– –– 25 B2-I 17 B2-O 9 A2-I 1 A2-O
–– –– 24 B1-I 16 B1-O 8 A1-I 0 A1-O