Datasheet

SN54ABT657A, SN74ABT657A
OCTAL TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS
AND 3-STATE OUTPUTS
SCBS192E – JANUARY 1991 – REVISED JUNE 1997
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
T/R
OE
ERR
A1
A2
A3
A4
A5
A6
A7
A8
ODD/EVEN
PARITY
B2
B3
B4
B5
B6
B7
B8
B1
1
2
3
4
5
6
8
9
10
11
24
13
12
23
22
21
20
17
16
15
14
Pin numbers shown are for the DW, JT, and NT packages.