Datasheet

DM54OO/DlM7400 Quad P-Input NAND Gates
General Description
This device contains four independent gates each of which
performs the logic NAND function.
Connection Diagram
vcc
Dual-In-Une Package
44
Y4
03
TLIF/6613-1
Order Number DY54WJ or DM74WN
See NS Package Number J14A or Nl4A
Function Tabie
t-i = Hiih Logic Level
L = Low Logic Level
.
~. Absolute Maximum Ratings (Note)
’ &~~Ifkatlons for Mllitary/Aerospace products arc not
Note: 77~ Ybsofute Mwmuh fktingsSg ah ho& vahes
contalned In thls datasheet. Rufer to the assoclatad beywnd whioh the safely of the dhice cahwt be guaran-
r&bMty electrical tost 8Peclflcatlons document. teed. Xhe deW shouldnotbe opwatedat Hese hnits. lRe
SuppIy Vobge
7v
paramett& dtes de@d in tiq ’ ‘EhctnW Charactwistks ”
Input Voltage 5.5V
tsble ab bot gk&wt& at ihe abs&te ma.umum ratings
Dperating Free Air Temperature Range
771~ W~mn?end@ @emting Glmdibons” table Wl &fine
DM54
- 55’C to + 125°C
the twnoMms foy actual de&e qxxkm.
DM74
0% to + 70°C
Storage Temperature Range -65°C to + 150%
Recommended Operating ConMons
Parameter
EkCtriCal Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter Condltlons
Min Typ
(Note 1)
1 Max 1 Unlts
Low Level output
Shorl Circuit
Output Cunent
V~=Max
DM54 -20 -55
(Note 2)
DM74
1
mA
-18
-55
/ I
4
I I
8 mA
Supply Current with V~=Max
12
22
mA
Switching Characteristics at Vm = 5v and TA = 25% (See Section 1 for Test Waveforms and Output Load)
Symbol
tPLH
tPHL
Parameter
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
Condltions
CL = 15pF
RL = 40011
Min
Max
22
15
Unlts
ns
ns
High to Low Level Output
I
I I
Nota 1: All typiilr am 81 Vm - 5V, TA - 25%.
Nota 2: Not mom Man one output should be shotted ata Urne.