Datasheet

  
  
   
SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued)
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SN7400N SN7400N
PDIP − N Tube
SN74LS00N SN74LS00N
PDIP − N
Tube
SN74S00N SN74S00N
Tube SN7400D
7400
Tape and reel SN7400DR
7400
SOIC − D
Tube SN74LS00D
LS00
SOIC − D
Tape and reel SN74LS00DR
LS00
0°C to 70°C
Tube SN74S00D
S00
0 C to 70 C
Tape and reel SN74S00DR
S00
SN7400NSR SN7400
SOP − NS Tape and reel
SN74LS00NSR 74LS00
SOP − NS
Tape and reel
SN74S00NSR 74S00
SOP − PS
Tape and reel
SN74LS00PSR LS00
SOP − PS Tape and reel
SN74S00PSR S00
SSOP − DB Tape and reel SN74LS00DBR LS00
SNJ5400J SNJ5400J
CDIP − J Tube
SNJ54LS00J SNJ54LS00J
CDIP − J
Tube
SNJ54S00J SNJ54S00J
−55°C to 125°C
SNJ5400W SNJ5400W
−55°C to 125°C
CFP − W Tube
SNJ54LS00W SNJ54LS00W
CFP − W
Tube
SNJ54S00W SNJ54S00W
LCCC − FK
Tube
SNJ54LS00FK SNJ54LS00FK
LCCC − FK
Tube
SNJ54S00FK SNJ54S00FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A B
OUTPUT
Y
H H L
L XH
X L H
logic diagram, each gate (positive logic)
A
B
Y