Datasheet

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LIVE INSERTION/GLITCH-FREE POWER UP/DOWN
SN65MLVD201 , SN65MLVD203
SN65MLVD206 , SN65MLVD207
SLLS558C DECEMBER 2002 REVISED JANUARY 2007
The SN65MLVD201/203/206/207 family of products offered by Texas Instruments provides a glitch-free
powerup/down feature that prevents the M-LVDS outputs of the device from turning on during a powerup or
powerdown event. This is especially important in live insertion applications, when a device is physically
connected to an M-LVDS multipoint bus and VCC is ramping.
While the M-LVDS interface for these devices is glitch free on powerup/down, the receiver output structure is
not.Figure 29 shows the performance of the receiver output pin, R (CHANNEL 2), as Vcc (CHANNEL 1) is
ramped.
Figure 29. M-LVDS Receiver Output: VCC (CHANNEL 1), R Pin (CHANNEL 2)
The glitch on the R pin is independent of the RE voltage. Any complications or issues from this glitch are easily
resolved in power sequencing or system requirements that suspend operation until VCC has reached a steady
state value.
Copyright © 2002 2007, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): SN65MLVD201 SN65MLVD203 SN65MLVD206 SN65MLVD207