Datasheet

SN65MLVD200, SN65MLVD202
SN65MLVD204, SN65MLVD205
MULTIPOINT–LVDS LINE DRIVERS AND RECEIVERS
SLLS463E – SEPTEMBER 2001 – REVISED JUNE 2003
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
Type-1 and Type-2 receivers
The M-LVDS standard defines Type-1 and Type-2 receivers. Type-1 receivers include no provisions for failsafe
and have their differential input voltage thresholds near zero volts. Type-2 receivers have their differential input
voltage thresholds offset from zero volts to detect the absence of a voltage difference. Type-1 receivers
maximize the differential noise margin and are intended for maximum signaling rates. Type-2 receivers are
intended for control signals and slower signaling rates. The impact on receiver output by the offset input can
be seen in Table 3 and Figure 33.
Table 3. M-LVDS Receiver Input Voltage Threshold Requirements
Receiver Type Output Low Output High
1 –2.4 V ≤ V
ID
≤ –0.05 V 0.05 V ≤ V
ID
≤ 2.4 V
2 –2.4 V ≤ V
ID
≤ 0.05 V 0.15 V ≤ V
ID
≤ 2.4 V
–100
–50
0
50
100
150
200
Type 1
Transition Regions
Type 2
Low
High
Low
High
– Differential Input Voltage – mV
V
ID
Figure 33. Receiver Differential Input Voltage Showing Transition Region