Datasheet

SN65MLVD200, SN65MLVD202
SN65MLVD204, SN65MLVD205
MULTIPOINT–LVDS LINE DRIVERS AND RECEIVERS
SLLS463E – SEPTEMBER 2001 – REVISED JUNE 2003
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 25
0
5
10
15
20
25
10 20 30 40 50
V
IC
= –0.5 V
V
IC
= 1 V
V
IC
= 3 V
f – Clock Frequency – MHz
ADDED TYPE 1 RECEIVER PERIOD JITTER (1 SIGMA)
vs
CLOCK FREQUENCY
V
CC
= 3.3 V,
T
A
= 25°C,
Input = Clock,
V
ID
= 250 mV
– Receiver Period Jitter (1 Sigma) – ps
t
jit(per)
Figure 26
0
5
10
15
20
25
10 20 30 40 50
V
IC
= 1 V
V
IC
= 3 V
V
IC
= –0.5 V
f – Clock Frequency – MHz
ADDED TYPE 2 RECEIVER PERIOD JITTER (1 SIGMA)
vs
CLOCK FREQUENCY
V
CC
= 3.3 V,
T
A
= 25°C,
Input = Clock,
V
ID
= 500 mV
– Receiver Period Jitter (1 Sigma) – ps
t
jit(per)
Figure 27
0
50
100
150
200
250
10 20 30 40 50
f – Clock Frequency – MHz
ADDED DRIVER CYCLE-TO-CYCLE JITTER (PEAK)
vs
CLOCK FREQUENCY
V
CC
= 3.3 V,
T
A
= 25°C,
Input = Clock
– Driver Cycle-to-Cycle Jitter (Peak) – ps
t
jit(cc)
Figure 28
0
50
100
150
200
250
10 20 30 40 50
V
IC
= 1 V
V
IC
= 3 V
V
IC
= –0.5 V
f – Clock Frequency – MHz
ADDED TYPE 1 RECEIVER CYCLE-TO-CYCLE
JITTER (PEAK)
vs
CLOCK FREQUENCY
V
CC
= 3.3 V,
T
A
= 25°C,
Input = Clock,
V
ID
= 250 mV
– Receiver Cycle-to-Cycle Jitter (Peak) – ps
t
jit(cc)