Datasheet

SN65MLVD200, SN65MLVD202
SN65MLVD204, SN65MLVD205
MULTIPOINT–LVDS LINE DRIVERS AND RECEIVERS
SLLS463E – SEPTEMBER 2001 – REVISED JUNE 2003
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
A/Y
B/Z
0 V or V
CC
1.62 kΩ
C
V
A
, V
B
, V
Y
or V
Z
Figure 7. Maximum Steady-State Output Voltage Test Circuit
t
c(n)
t
c(n+1)
OUTPUT
0 V DIFF
V
A
–V
B
or V
Y
–V
Z
t
jit(cc)
= | t
c(n)
– t
c(n+1)
|
t
c(n)
1/f0
0 V
0 V
Period Jitter
0 V Diff
Peak to Peak Jitter
1/f0
PRBS INPUT
OUTPUT
V
A
–V
B
or V
Y
–V
Z
V
A
–V
B
or V
Y
–V
Z
CLOCK
INPUT
IDEAL
OUTPUT
ACTUAL
OUTPUT
V
CC
V
CC
/2
t
jit(per)
= t
c(n)
–1/f0
V
A
– V
B
or V
Y
– V
Z
t
jit(pp)
0 V
V
CC
V
CC
/2
0 V
NOTES: A. All input pulses are supplied by an Agilent 8304A Stimulus System.
B. The measurement is made on a TEK TDS6604 running TDSJIT3 application software
C. Period jitter is measured using a 100 MHz 50 ±1% duty cycle clock input.
D. Peak-to-peak jitter is measured using a 200Mbps 2
15
–1 PRBS input.
Figure 8. Driver Jitter Measurement Waveforms
(V
A
+ V
B
)/2
I
O
R
V
CM
V
O
V
ID
V
B
V
A
I
A
A
B
I
B
Figure 9. Receiver Voltage and Current Definitions