Datasheet

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DRIVER ELECTRICAL CHARACTERISTICS
SN65MLVD200A , SN65MLVD202A
SN65MLVD204A , SN65MLVD205A
SLLS573 – DECEMBER 2003
over recommended operating conditions unless otherwise noted
PARAMETER TEST CONDITIONS MIN
(1)
TYP
(2)
MAX UNIT
|V
AB
| or
Differential output voltage magnitude 480 650 mV
|V
YZ
|
See Figure 2
∆ |V
AB
| or Change in differential output voltage magnitude
–50 50 mV
∆ |V
YZ
| between logic states
V
OS(SS)
Steady-state common-mode output voltage 0.8 1.2 V
Change in steady-state common-mode output
∆ V
OS(SS)
See Figure 3 –50 50 mV
voltage between logic states
V
OS(PP)
Peak-to-peak common-mode output voltage 150 mV
V
Y(OC)
or
Maximum steady-state open-circuit output voltage 0 2.4 V
V
A(OC)
See Figure 7
V
Z(OC)
or
Maximum steady-state open-circuit output voltage 0 2.4 V
V
B(OC)
V
P(H)
Voltage overshoot, low-to-high level output 1.2 V
SS
V
See Figure 5
V
P(L)
Voltage overshoot, high-to-low level output –0.2 V
SS
V
I
IH
High-level input current (D, DE) V
IH
= 2 V to V
CC
0 10 µA
I
IL
Low-level input current (D, DE) V
IL
= GND to 0.8 V 0 10 µA
|I
OS
| Differential short-circuit output current magnitude See Figure 4 24 mA
–1.4 V ≤ (V
Y
or V
Z
) ≤ 3.8 V,
I
OZ
High-impedance state output current (driver only) –15 10 µA
Other output = 1.2 V
–1.4 V ≤ (V
Y
or V
Z
) ≤ 3.8 V, Other
I
O(OFF)
Power-off output current –10 10 µA
output = 1.2 V, 0 V ≤ V
CC
≤ 1.5 V
V
I
= 0.4 sin(30E6 π t) + 0.5 V,
(3)
C
Y
or C
Z
Output capacitance Other input at 1.2 V, driver 3 pF
disabled
V
AB
= 0.4 sin(30E6 π t) V,
(3)
C
YZ
Differential output capacitance 2.5 pF
Driver disabled
C
Y/Z
Output capacitance balance, (C
Y
/C
Z
) 0.99 1.01
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
(2) All typical values are at 25 ° C and with a 3.3-V supply voltage.
(3) HP4194A impedance analyzer (or equivalent)
4
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