Datasheet

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0
1
2
3
4
5
25 50
75 100 125
f -ClockFrequency-MHz
CLK
t rms-Cycle-to-CycleJitter-ps
jit(c-c)
MLVD2(Type1)
MLVD3(Type2)
V =3.3V,T =25 C,
SeeFigure4
CC A
º
0
1
2
3
4
5
25 50 75 100
125
f -ClockFrequency-MHz
CLK
t rms-PeriodJitter-ps
ji
t(per)
MLVD3(Type2)
MLVD2(Type1)
V =3.3V,T =25 C,
SeeFigure4
CC A
º
EYE PATTERNS
666.9ps/div
33.5mV/div
SN65MLVD2
SN65MLVD3
SLLS767 – NOVEMBER 2006
TYPICAL CHARACTERISTICS (continued)
ADDED RECEIVER PERIOD JITTER ADDED RECEIVER CYCLE-TO-CYCLE JITTER
vs vs
CLOCK FREQUENCY CLOCK FREQUENCY
Figure 13. Figure 14.
Figure 15. SN65MLVD2 Output (V
CC
= 3.3 V, C
L
= 15 pF) 250 Mbps 2
15
–1 PRBS
13
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