Datasheet

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DEVICE ELECTRICAL CHARACTERISTICS
SN65MLVD128
SN65MLVD129
SLLS586 – MARCH 2004
over recommended operating conditions unless otherwise noted
PARAMETER TEST CONDITIONS MIN
(1)
TYP
(2)
MAX UNIT
LVTTL (D, EN) INPUT SPECIFICATIONS
|I
IH
| High-level input current V
IH
= 2 V or V
CC
10 µA
|I
IL
| Low-level input current V
IL
= GND or 0.8 V 10 µA
C
i
Input capacitance V
I
= 0.4 sin(30E6 π t) + 0.5 V
(3)
5 pF
M-LVDS (A, B) OUTPUT SPECIFICATIONS
|V
AB
| Differential output voltage magnitude 480 650 mV
See Figure 2
Change in differential output voltage magnitude
∆ |V
AB
| –50 50 mV
between logic states
V
OS(SS)
Steady-state common-mode output voltage 0.8 1.2 V
∆ V
OS(SS
Change in steady-state common-mode output
See Figure 3 -50 50 mV
)
voltage between logic states
V
OS(PP)
Peak-to-peak common-mode output voltage 150 mV
Maximum steady-state open-circuit output
V
A(OC)
0 2.4 V
voltage
See Figure 7
Maximum steady-state open-circuit output
V
B(OC)
0 2.4 V
voltage
1.2
V
P(H)
Voltage overshoot, low-to-high level output V
V
SS
See Figure 5
V
P(L)
Voltage overshoot, high-to-low level output –0.2 V
SS
V
Differential short-circuit output current
|I
OS
| See Figure 4 24 mA
magnitude
–1.4 V ≤ (V
A
or V
B
) ≤ 3.8 V,
I
OZ
High-impedance state output current –20 20 µA
Other output = 1.2 V
–1.4 V ≤ (V
A
or V
B
) ≤ 3.8 V,
I
O(OFF)
Power-off output current –20 20 µA
Other output = 1.2 V, 0 ≤ V
CC
≤ 1.5 V
V
I
= 0.4 sin(30E6 π t) + 0.5 V,
(3)
C
A
orC
B
Output capacitance 3 pF
Other input at 1.2 V, driver disabled
V
I
= 0.4 sin(30E6 π t) V,
(3)
C
AB
Differential output capacitance 2.5 pF
Driver disabled
C
A/B
Output capacitance balance, (C
A
/C
B
) 0.99 1.01
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
(2) All typical values are at 25 ° C and with a 3.3-V supply voltage.
(3) HP4194A impedance analyzer (or equivalent)
4
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